I'd like to ask about external memory read timing of ADuC7026.
According to datasheet page 14, Table 3. External Memory Read Cycle,
tDATA_BEFORE_RD_H is specified min 16ns.
tDATA_AFTER_RD_H is specified min 8ns, typ "+ (! XMxPAR) × CLK"
Is that mean memory read "setup time" is min 16ns after RS rising?
Also can I think that "hold time" is same as tDATA_AFTER_RD_H ?
About "+ (! XMxPAR) × CLK"
Is it mean if MxPAR == 0, then tDATA_AFTER_RD_H become 8ns + 1 clk ?
(I'd like to confirm about "!" usage in the datasheet.
Thank you for your help in advance.