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AD9915 Sync_out generation

Question asked by amchardy on Sep 30, 2014
Latest reply on Oct 3, 2014 by amchardy

Hi all, hope somebody can help me out.

 

The AD9915 datasheet (Rev. D) seems to contradict itself with regards to generating the Sync_out signal on pin 61 (for the device used as the master timing source).

 

Page 34 suggests that bits [9:8] of CFR2 (0x01) should be set high to do this. However, page 43 suggests that if the SYNC out/in mux enable bit (0x01[8]) is set high then the SYNC_IN signal would be routed to pin 61 rather than the internally generated SYNC_OUT signal.

 

Which is correct?

 

Thanks in advance!

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