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ADV212 in DMA burst mode

Question asked by HankZ on Sep 24, 2014
Latest reply on Sep 24, 2014 by DaveD

I was wondering whether the ADV212 device can handle regular non-DMA

transactions during a DMA burst, or will this confuse the device?

 

The situation is thus :  ADV212 performing compression in HIPI mode with a 32b

bus, EDMOD set up for burst-mode DMA with a burst size of 128.  Suppose DREQ0

is asserted by the device, DACK1 is asserted in response and some quantity

(less than 128) of data words are sent to the CODE register for fifo'ing . Now

another write or read is sent (DACK1 is still asserted) to some other address,

and then the remainder of the burst is written.  At that point the DACK0 is

released.  (same question for DREQ1/DACK1 except reads are performed instead of

writes).

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