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still with continuos conversion mode in ad7195

Question asked by renato62 on Sep 24, 2014
Latest reply on Sep 25, 2014 by r.daemon@tugraz.at

22 august

Hi,

I can not read the ad7195 in continuos conversion mode. As described on page 30 of the data sheet, when the line DOUT / RDY goes low, I write the data 0x58 on the DIN line  (see fig. 1), and after I read the data present on the line DOUT / DRY (see fig. 2 -24 bit data). My problem is that I can only read the last two bytes of the data and not three bytes. I can not understand where the problem is.

can you help me?

Best regards.

Renato


25 august from JohnnyG

Hi Renato,

 

Can you try to answer the following questions below? We need additional information so we can serve you better.

 

1) How is the AD7195 configured? What values are written to the on-chip registers?

2) What is the reference voltage and what voltage is applied to the analog input? From this information, it will help me calculate the expected code.

3) Can you confirm that continuous conversion mode is used and that the continuous read mode is disabled?

4) Can you confirm that the correct SCLK edge is used to output data from the processor?

 

Regards,

Johnny




25 august from JohnnyG

Hi Renato,

 

I would like to add this as you mention continuous read mode.

 

Is the CREAD bit in the communications register set to 0 or 1? If this bit is set to 1, the serial interface is dedicated to reads of the data register. In this case, you do not need to write 58 hex to the ADC to read a conversion. You only need to apply 24 SCLK pulses and the 24-bit conversion is placed on the DOUT/RDY line.

 

For debug purposes, I suggest you leave the CREAD bit set to 0. You will now need to write 58 hex to the ADC to

read the data register.

 

Regards,

Johnny

 

today, 24 september

Hi Johnny

sorry but I have not been well and have recently returned to work. I shall answer your questions.

 

1) How is the AD7195 configured? What values are written to the on-chip registers?

 

  1. Reset AD7195 sending 40 bit at logic level high
  2. Configuration register= 0x000107
  3. Mode register=0x080018
  4. Comunication register=0x58

 

 

2) What is the reference voltage and what voltage is applied to the analog input? From this information, it will help me calculate the expected code.

 

a) REFIN+=5V, REFIN-=0V
b) Ain1-Ain2=+/-10mV

 

 

3) Can you confirm that continuous conversion mode is used and that the continuous read mode is disabled?

 

When I configured AD7195, the Comunication Register  is set in “continuos conversion” with byte 0x58

When the line DOUT/RDY goes to low, I send the byte 0x58 to comunication register and after read the data register with 24 SCLK pulse.

Doing so read only the last two bytes and not the first. The data goes from 0x000000 to 0x00ffff, the next step the data is 0x000000 and not 0x010000.

 

 

 

4) Can you confirm that the correct SCLK edge is used to output data from the processor?

 

I tried all four combinations of idle and clock edge.

 

Answer me if you can.


Best Regards

Renato

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