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AD-FMCADC2-EBZ: No DIVCLK after power-up - board D.O.A. or error in user guide?

Question asked by Chris_Aed on Sep 22, 2014
Latest reply on Sep 23, 2014 by Chris_Aed

Hi to all,


I am facing some problems in my initial bring-up test of the AD-FMCADC2-EBZ board (FMC board equipped with AD9625) by means of a self-written FPGA test design running on a Xilinx VC707  board.


According to the board's user guide as well as the AD9625's user guide, the AD9625 is supposed to automatically output a DIVCLK signal right after power-up. (DIVCLK = input clock from on-board oscillator divided by 4). The default values of all the ADC's internal command register support the initial generation of DIVCLK without the need for any further configuration.


However, after powering up my FMCADC2/VC707 combo no DIVCLK is generated by the ADC although

- all LED are lit on the FMC board

- all supply voltages (12V, 3.3V, 2.5V, 1.8V, 1.3V) are present on the board

- I can measure a nice and clean 2.5GHz input clock to the ADC coming from the on-board oscillator


In addition, I have tried to perform write and read accesses to the ADC per SPI but the ADC doesn't respond (no read back possible, no change of behaviour). I have already verified the proper operation of my SPI controller by using the Vivado serial analyzer.


I am wondering if the user guides are wrong or if my FMC board is D.O.A.


Any help is appreciated.


Kind regards