Below are descriptions on page 70 and 71 of ADV739x datasheet, respectively.
Could you elaborate on what each sentence underlined in red mean?
Assuming the 739x is on layer 1 and layer 2 is a solid ground plane, then the termination resistor should be on layer 1.
digital traces need to referenced to ground planes and kept away from Vaa and PVdd to keep switching noise away from those power rails. In general you want to keep digital switching noise away from any analog signal.
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