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ADV8005 HDMI Clock

Question asked by J_Miller on Sep 16, 2014
Latest reply on Sep 22, 2014 by J_Miller

I have a design with the ADV8005 that is failing the HDMI Clock Duty Cycle Test.  The HDMI clock is being driven with a ~35% duty cycle. This is happening when driving 4k30 video.

 

The input video clock looks good on a scope and is 50% duty cycle.  The 27Mhz crystal is also measured at 50% duty cycle.

 

See attached register dump.

 

I have tried setting the CCI_CONTROLS (Bit0 of 0xECEA) and this has no effect on the HDMI Clock.

 

Any information would be appreciated.

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