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ADV7393 Sync Generation

Question asked by mike.baker Employee on Sep 15, 2014
Latest reply on Sep 15, 2014 by DaveD


I need to output sensor data, 640 x 480, monochrome, in square pixel mode. Is it possible for the ADV7393 to be the sync master, generating HSYNC and VSYNC, that an FPGA then uses to output YCbCr data? Or, must the FPGA provide data plus HSYNC/VSYNC or EAV/EAS codes using the script files shown in tables 79 or 80? Thanks...

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