AnsweredAssumed Answered

VREF

Question asked by Deepakkumar Employee on Sep 11, 2014
Latest reply on Dec 15, 2014 by Prashant


Hi Folks,

 

I am working on ADSPCM40x.  The VREF and the bandgap starts up to 2.325V and 1.16V respectively. I realized that the reference select bit needs to be explicitly set to 0 for correct voltage to show up during boot up with a delay after selection of the internal reference.

 

Is this expected?

 

Also, Do you have a recommended power up sequence for 3.3V_IO, 3.3V_ANA and VDD_INT? Can incorrect turn on sequence cause this?

 

Thanks

Deepak

Outcomes