I am trying to get the reference design up and running just like how it worked out of the box before I start customizing/modifying the reference design. However, I receive "kernel panics" messages at the very end of the process of recreating the reference design. I have a Zedboard and FMCOMMS1-EBZ and am using Vivado 2013.4.
Since I am a first time user of Vivado and Zynq, I would like to make sure what I did below is right.
1) I went to AD-FMCOMMS1-EBZ HDL Reference Design [Analog Devices Wiki] and downloaded the files at Release fmcomms1_v2013_4_2014_07_25 · analogdevicesinc/hdl · GitHub .
2) I went into the library folder and sourced all the tcls of the provided IPs.
3) I went to projects\fmcomms1\zed and sourced system_project.tcl. The project produced a bitstream.
4) Then I opened up SDK and selected Create Zynq Boot Image. I used the pre-built zynq-fsbl_0.elf and the u-boot.elf provided in the SD card's folder zynq-zed-adv7511-xcomm in addition to the bitstream created in the last step to produce BOOT.bin. This bitstream was created by the reference design without any modifications done.
5) Replaced BOOT.bin in the SD card with the newly created BOOT.bin.
6) Booted up the Zedboard and received "kernel panic." Attached is the file with the error output.
Did I miss any steps? I assumed that since the reference hardware design should produce a bitstream just like the SD card's, I could just replace the *.bit file when created BOOT.BIN. Is that a bad assumption?