are there some informations about the setps of the offset adjustment via SPI? If I use an Offset of 0x01, the smallest positive Offset, then the Output Offset is realy high (about 100 in dez).
Please can anybody help me.
Your observations was confirmed by a member of the design teem that a 1 LSB step size results in this large step size seen at the digital output. Apparently this was a 'bug: in the silicon since the intent was that a 1LSB offset change would result in corresponding 1 LSB change in the digital output. It was for this reason that this register was not described in the datasheet.
Retrieving data ...