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AD9361 - BIST data generator

Question asked by idan_ar@eyal-emi.co.il on Sep 3, 2014
Latest reply on Sep 7, 2014 by idan_ar@eyal-emi.co.il

Hello,

 

I'm working with the AD9361 with LVDS (6 differential lines x 2) interface in order to get max. performance and sampling.

Data clock is around 2nsec. full-duplex.

I'm using the AD9361 BIST data looopback (Tx data -> Rx data). in order to achieve alignment I'm changing the Tx and Rx delay (Reg 0x006, 0x007).

Reg. set up: 0x3F4=0x00; 0x3F5=0x41;0x3F6=0x00.

 

The delay should be around 1nsec. A series is generated via LVDS Tx data (48 bits x2 - 0x010101010101 0x123456789ABC).

My problem is that some time I receive the same series ans some time I get some bit shifts. I want to split the interface to 2 separate cases. (LVDS Tx -> AD9361 digital, AD9361 digital -> Rx LVDS).

 

Question:

  1. Is there a way to transmit the series and read it from AD9361 digital machine what was received from the Tx data LVDS?
  2. Is there a way to generate a series from the AD9361 digital machine to the Rx data LVDS?

 

Thanks,

Idan Artom.

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