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ADuC7023 PLA difficulties

Question asked by nate.domin on Sep 2, 2014
Latest reply on Sep 2, 2014 by nate.domin

I am trying to generate an external 1 MHz clock using the PLA features of an ADuC7023.  I have been successful in generating a clock on an Eval-ADuC7023QSPZ1 (40-pin) P2.2, but have been failing to generate the clock using the same firmware on our target hardware featuring a 36-pin WLCSP.

 

The configurations I have been using relies on Timer1 but I have also experimented with the Internal Oscillator without success on our target hardware (successful with the Evalboard though).

 

T1LD  = 19; // Load Timer1 "ticks"

T1CON = 0x000000C0; // Enable Timer 1 for periodic firing

 

PLACLK = 0x00000055; // Configure PLACLK for Timer1 Overflow

// PLACLK = 0x00000077; // Internal Oscillator results in 8kHz clock on Evalboard Nothing on Target HW

PLAELM6 = 0x018A; // Input of E7-out, using Mux 1, Not B, and Flip-Flop ON

PLAELM7 = 0x0659; // Input of E6-out, using Mux 0, A, and Flip-Flop OFF

PLADOUT = 0x00000040; // Element 6, P2.2 on

 

I tried to use the PLA tool (v2.5) but repeatedly got an error:

"An error occurred while attempting to generate code:  Access to the path 'C:\Program Files (x86)\Analog Devices Inc\ADuC PLATool v2.5\codetemplate.txt' is denied."

 

In either regard, I believe the code above should be working as it does work on the evaluation board.  Can someone please shed light on what I am doing wrong?

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