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Microblaze program (sometimes) hangs before first DDR memory read in AD9279 design

Question asked by z00345up on Aug 28, 2014
Latest reply on Aug 28, 2014 by rejeesh

I am using the reference design for AD9279 with the ML605 to capture the data and read it back from DDR memory. I have an intermittent problem where the program hangs right before the first memory read. It happens about a third of the time. I am using SDK to program FPGA with the bit/elf files. Below is the slightly modified C code and attached is the system assembly view from XPS.

 

#include <stdio.h>

#include "platform.h"

#include "xbasic_types.h"

#include "xstatus.h"

#include "xil_io.h"

#include "xparameters.h"

#include "xuartlite_l.h"

 

#define CF_BASEADDR   XPAR_AXI_ADC_8C_0_BASEADDR

#define DDR_BASEADDR  XPAR_DDR3_SDRAM_S_AXI_BASEADDR

#define DMA_BASEADDR  XPAR_AXI_DMA_0_BASEADDR

#define UART_BASEADDR XPAR_RS232_UART_1_BASEADDR

#define SPI_BASEADDR  XPAR_AXI_SPI_0_BASEADDR

 

// ***************************************************************************

// ***************************************************************************

 

extern char inbyte(void);

void xil_printf(const char *ctrl1, ...);

 

void delay_ms(u32 ms_count) {

  u32 count;

  for (count = 0; count < ((ms_count * 100000) + 1); count++) {

    asm("nop");

  }

}

 

// ***************************************************************************

// ***************************************************************************

 

void adc_capture(u32 qwcnt, u32 sa) {

  Xil_Out32((DMA_BASEADDR + 0x030), 0); // clear dma operations

  Xil_Out32((DMA_BASEADDR + 0x030), 1); // enable dma operations

  Xil_Out32((DMA_BASEADDR + 0x048), sa); // capture start address

  Xil_Out32((DMA_BASEADDR + 0x058), (qwcnt * 8)); // number of bytes

  Xil_Out32((CF_BASEADDR + 0x00c), 0x0); // capture disable

  Xil_Out32((CF_BASEADDR + 0x010), 0xfffff); // clear status

  Xil_Out32((CF_BASEADDR + 0x014), 0xfffff); // clear status

  Xil_Out32((CF_BASEADDR + 0x00c), (0x10000 | (qwcnt - 1))); //start capture

  do {delay_ms(1);}

  while ((Xil_In32(CF_BASEADDR + 0x010) & 0x1) == 1); //while status =1

  if ((Xil_In32(CF_BASEADDR + 0x010) & 0x02) == 0x02) { //if overflow =1

    xil_printf("Overflow occurred, capture may be corrupted\n\r");

  }

   microblaze_flush_dcache();

   microblaze_invalidate_dcache();

}

 

// ***************************************************************************

// ***************************************************************************

 

int main() {

 

  u32 n,i;

  u32 idata;

  u32 rdata[8] = {0};

 

  init_platform();

  xil_printf("Platform initialized...\n\n\r");

 

 

  xil_printf("Testing ADC read...\n\r");

  if ((Xil_In32(CF_BASEADDR)) == 0x10062) { //if match

     xil_printf("ADC read successful!\n\n\r");

  }else{

     xil_printf("ADC read failed!\n\n\r");

  }

 

  xil_printf("Starting capture...\n\r");

  adc_capture(16, DDR_BASEADDR);

  delay_ms(10);

 

  for (n = 0; n < 8; n++) {

   for (i=0; i<4; i++){

  //PROGRAM HANGS HERE

   idata = Xil_In32(DDR_BASEADDR+(n*16)+(i*4));

    rdata[(i*2)] = idata & 0xffff;

    rdata[(i*2)+1] = (idata>>16) & 0xffff;

    }

   }

  for (i=0; i<8; i++){

   xil_printf("%d: %04x\n\r",i,rdata[i]);

  }

 

  xil_printf("Done... Exiting program.\n\r");

  microblaze_flush_dcache();

  microblaze_invalidate_dcache();

  cleanup_platform();

  return 0;

}

// ***************************************************************************

// ***************************************************************************

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