We are using a PC with 3.3V I/O Parallelport for programming. Since the pins are giving 3.3V, We need not have to add extra interface. My connections are shown below
D0 ----> SCLK
D1 ----> SDIO
D2 ----> CS#
D3 ----> IORST
D4 ----> UPD_CLK
D5 ----> SDIO_Buffer_enable
Where SDIO_Buffer_enable is used to enable the tristate buffer connected to D5. For write operation I will enable the buffer and for reading, I am disabling the buffer. So that when I am giving the read command, clock and control signal will be generated, and I can probe SDIO pin whether Iam reading properly.
The problem is that when reading SDIO pin is always low. What may be the reason??