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AD9625 pull up and pull down resitors

Question asked by ctzof on Aug 22, 2014
Latest reply on Aug 22, 2014 by r.daemon@tugraz.at

Hello,

 

We are trying to develop a new software defined platform and we are currently trying to build the DAQ system. We are going to use AD9625 ADC in our board so we try to base our design to their evaluation board AD9625-FMC-2500EBZ where they use FXLA104UM12X voltage translators. We want to use the same translator because there are signals coming to and from the FPGA that are not compatible with ADC and FPGA voltage. The problem is that we want to use in some pins pull up and pull down resistors to be sure that this pins have a known condition during power up, especially chip enable pins (otherwise we might encounter some problems and the chips could behave strange). In  FXLA104UM12X datasheet they say not to use pull up or pull down resistors with this chip. FPGA pins during power up are tristate and they can drive any kind of signals to these pins, also floating pins with an unknown condition could act as antennas interfere with neighboring signals. Attached you can find a picture taken from the schematic of our board. So what should you recommend me to do in this situation.

 

Christos

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