AnsweredAssumed Answered

ADG1208 large offset issue

Question asked by robin.hu Employee on Aug 21, 2014
Latest reply on Sep 2, 2014 by EricC

The circuit diagram is:


ADG1208_circuit.jpg

  1. The supply voltage:
    +12V&-9V, OPA2227 used as a buffer.
  2. Input voltage is low
    frequency pulse (50us period), ever tried with step input.
  3. When input with 0-1.3V,
    no problem, the measured voltage of TP is almost same as input, ie, 0-1.3V.
  4. When input 1.3V or
    higher, output: 1.3V+offset, offset is >1V.
  5. Same for 2 tested channels (they just test 2 channels, while rest unconnected channels have PU).
  6. Old design is ADG508F, no problem
    1. they tried to optimize the circuit for better performance of ADG1208.

 

I have doubt on the power up sequence to the ADG part in the circuit to possible cause latch-up(ADG1208 is not latch-up proof), but will the latch-up make the ADG1208 act to get result escribed above?

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