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Need clarity on this error

Question asked by ranjan.jk@nikhilon.com on Aug 21, 2014
Latest reply on Aug 21, 2014 by CsomI

Hi Rejeesh/CsomI

 

We are getting the same error while synthesis, even after doing the changes as per the instructions given in this thread https://ez.analog.com/thread/44213 for channel reduction, we are using zynq-7z030 series in our custom board.

 

Please have a look at the attached file and help us out in synthesis the design for single channel transceiver.

 

 

J K Ranjan

Hardware Engineer | FPGA Design

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