AnsweredAssumed Answered


Question asked by Schang Employee on Aug 18, 2014
Latest reply on Sep 4, 2014 by DaveD



The main issue was the STDI_DVALID_CHx can’t be asserted for background measurement when input was SOG/SOY signals. Below is the example I checked on ADV7850+ADV8005 EVB.


  1. Input source: VGA_SOG and Component YPbPr 
  2. Component as primary input and VGA_SOG as background for measurement
  3. Input pins connection:
    1. VGA: RGB à Ain1, Ain2, Ain3; HS à HS_IN1; VS à VS_IN1; SOG à SYNC1
    2. Component: YPbPr à Ain4, Ain5, Ain6; SOY à SYNC2
  4. Run script “4-2 720p YPbPr in 444 out through HDMI” can get correct output video
  5. The script above sets SYNC_CH2 as first priority, so SYNC_CH1 is used for VGA measurement
  6. Set “EMB_SYNC_1_SEL_MAN” to 1’b00 (sync pin 1)
  7. Set “SYN_SRC_CH1” to 1’b11 (for embedded sync)
  8. Set “CH1_EMB_SYNC_SEL” to 1’b01 (emb_sync_sel1)


After the settings above we can’t get “STDI_DVALID_CH1” set. We have confirmed the VGA signal is correct by running VGA script and can get correct output video. We also tried to change the signal format from  VGA_SOG to VGA_HV(separate sync) and change “SYN_SRC_CH1” to 1’b01 (for separate sync) then “STDI_DVALID_CH1” can be set.


Can someone have a try to see what’s problem in the configurations, thanks.