I have a multi-threaded VDK project in C running on a BF518 platform. Each thread has its own stack space on the heap memory (placed into SDRAM). This stack space is also used by the interrupt service routines (ISR). An ISR always uses the stack of the thread which was active when the IRQ has triggered. So far so good...
I have measured the time/cycles between the interrupt generation (RAISE) and the entry into an ISR handler which is currently ~1us. After having a closer look a the disassembly window, I realized that we spend most of the time saving the processor context onto the stack which is inside the relatively slow SDRAM memory. So even if I configure the ISR handler code to be placed in L1 program memory, the stack is still in SDRAM and slowing me down.
I wonder if there is a way of redirecting the SP and FP registers to dedicated L1 data memory when entering the ISR and then restoring them when the ISR handler exist. Has anyone tried this?