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GPIO_RESET_PIN_ZC706 pin definition

Question asked by wmaguire on Aug 11, 2014
Latest reply on Jan 24, 2017 by rejeesh

Hi all,

 

I have a basic question w.r.t the ADI FMCOMMS 2 demo code.  

 

 

Looking at the Verilog first the EMIO assigned is position 46 as shown below.

 

  IOBUF i_iobuf_gpio_resetb (

    .I (gpio_o[46]),

    .O (gpio_i[46]),

    .T (gpio_t[46]),

    .IO (gpio_resetb));

 

Now looking at the associated C code in main.c there is a note

 

 

#define GPIO_DEVICE_IDXPAR_PS7_GPIO_0_DEVICE_ID
#define GPIO_RESET_PIN100
#define GPIO_RESET_PIN_ZC70284
#define GPIO_RESET_PIN_ZC70683
#define GPIO_RESET_PIN_ZED100

 

// NOTE: The user has to choose the GPIO numbers according to desired

  // carrier board.

  default_init_param.gpio_resetb =   GPIO_RESET_PIN;

 

Looking at the definition of GPIO_RESET_PIN looks correct because as I understand it you need to add the MIO signal offset of 54

to calculate the GPIO pin.  In other words 54 +46 = 100.

 

My question is, why is it set to 83 for the ZC706 board when the Verilog puts it at 46/

 

Regards

 

 

Walter

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