I have recently started working on KC705 + fmcomms3-ebz (Vivado 2014.2). I am building the reference design hoping to get it working. I have experience in HDL coding however I am a newbie in embedded design so need help to move forward.
My initial goal is to stream the data captured by the ADC through ethernet. For this purpose I need to modify the reference design and use an AXI_Ethernet IP. The reference design already provides the ADC data in a stream from the block named "util_adc_pack" with ddata[63:0] and dvalid outputs. (which I can easily convert to an AXI Stream output with an additional custom block). From this point I need to grab the stream and feed it through the ethernet to be captured by the PC. As I said I do not have any experience n embedded design before and this will be my first.
Can you provide any help to get me started? Perhaps I have to start with a much simpler design than the reference design. Let me put it this way to be more generic. I need a simple design which only includes a microblaze, an AXI Stream source (supposing I have converted the output of util_adc_pack to AXIS), AXI_Ethernet IP and required peripherals such as AXI DMAs, FIFOs...etc to stream the source through ethernet. Can you please help me on this?
A tcl script to generate this basic block diagram would indeed be perfect.