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TDM 8 in and out from AD1939 with AD1974 as Aux

Question asked by jorpese on Aug 6, 2014
Latest reply on Aug 12, 2014 by jorpese

We are experiencing problems configuring a pair of codecs to provide a TCM stream to an OMAP DSP and would appreciate your comments.

 

In summary and in line with the attached schematic:

 

1. The system is based on  a AD1939 and a AD1974 to provide 8 inputs and 8 outputs

2. The AD1939 is connected to the DSP and provides the 8 outputs and 4 of the inputs

3. The AD1974 provides the additional 4 inputs and is linked to the AD1939

 

The problem we are experiencing is that we can set the AD1974 to generate the slots of samples for its 4 inputs (as seen on a scope) but cannot get them all to appear on the TDM stream from the AD1939 towards the DSP.

 

Please see photographs of scope screen shots.

 

If we set the AD1939 to TDM/AUX mode and the AD1974 to Stereo mode we can see slots for inputs 1 & 3 appear on the TDM stream towards the DSP, but there are blank periods where slots 2 & 4 should be. If we change the polarity of the LRClock, slots 2 & 4 appear in TCM stream but the position for 1 & 3 are then blank.

 

If we set the AD1939 to TDM/AUX mode and the AD1974 to TDM mode we can see slots for inputs 1  appear on the TDM stream towards the DSP, but there are blank periods where slots 2 3 & 4 should be.

 

We have noticed is that the LRClock towards the DSP and the LRClock towards the AD1974 (both generated by the AD1939) and out of phase by approx. 1/4 of the period. Is this usual or could this phase difference be gating the presentation of the AD1974 data onto the TCM stream in such a way as that only two of the sample slots are present?

 

The register values for the codecs are as follows:

 

 

AD1939 Config

 

ADDR0: Internal MCLK on, PLL input MCLK, XTAL on, Input 256, PLL ON

ADDR1: PLL indicator, Vref=external, ADCclk=PLL, DACclk=PLL

 

ADDR2: SerFmt: TDM, Delay 0, 48kHz, Pwr ON

ADDR3: BCLK Pol norm, BCLK internal, Bck M, LRclk M, LRcLK: Left Low, 8ch, BCLK active edge middle. 

ADDR4: DAC pol: non_inv, 24 bits, no de-emph, unmuted

 

ADD14: 48kHz, 2R on, 2L on, 1R on, 1Lon, HPF off, PWR ON

ADD15: Bclk sample middle, SerFmt: Aux/TDM, Delay: 0, Word 24

ADD16: Internal BCLK, Bclk M, 256bclks/frame, LR M, LR Left Low,

                        Bclk fall, 50/50

 

AD1939 Registers

 

0 - 1000 0000

1 - 0000 0100

 

2 - 1000 1000

3 - 0111 0100

4 - 0000 0000 

 

5-13: 0000 0000

 

14 - 0000 0000

15 - 0100 0100

16 - 1110 1000

 

AD1974 Config

 

ADDR0: Internal MCLK on, PLL input ALRCLK, XTALout off, Input 256, PLL ON

ADDR1: resrvd,  PLL indicator, Vref=external, ADCclk=PLL, Aux_clk=PLL

 

ADDR2: Does not matter (no Aux)

ADDR3: Does not matter (no Aux)

ADDR4: Does not matter (no Aux)

 

ADD14: 48kHz, 2R on, 2L on, 1R on, 1Lon, HPF off, PWR ON

ADD15: Bclk sample middle, SerFmt: Stereo, Delay: 0, Word 24

ADD16: Internal BCLK, Bclk S, 256bclks/frame, LR S, LR Left Low,

                        Bclk fall, 50/50

 

AD1974 Registers

 

0 - 1101 1000

1 - 0000 0100

 

2 - 0000 0000

3 - 0000 0000

4 - 0000 0000

 

5-13: 0000 0000

 

14 - 0000 0000

15 - 0000 0100

16 - 1010 0000

 

Could you please advise? Thank you very much in advance,

Jordi

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