I am using AD9631 for one of our project, my design flow are as follows,
1) Driving analog signal from outside through SMA connector.
2) An RF transformer to convert single ended to differential signal.
3) Driving this differential signal through ADC differential amplifier.
4) Output from differential amplifier is fed to ADC through an Anti-Aliasing filter,
which is designed for 3GHz , 3rd order bandpass butterworth filter.
5) Finally reaching out ADC receive pins.
1) Output from DAC pins are fed to RF transformer.
2) Output of transformer is fed to, Matching Balun then to SMA connector.
My question is does this design meets our requirement if it is used as custom high speed data acquisition board with Xilinx Zynq.
Thanks & Regards
J. K. Ranjan