I would like to test SMC between ADSP - BF609 and FPGA development board communication,Using CrossCore Embedded Studio writing BF609 SMC program, but I have no idea, can you give me some advice?
What is it exactly that you are looking for. SMC is an asynchronous interface which provides flexible timing configuration programability to interface to a wide range of asynchronous devices which includes FPGA as well. All you have to do is to program a set of registers according to the timings of FPGA and its operation mode. When I say operating mode I mean the type of timings it supports. SMC supports Asynchronous Flash mode, SRAM mode, Page mode as well as Synchronous Burst mode. The description and timings for these modes is given in HRM and data sheet. Look at them and see which one is suitable for your FPGA.
Also remember SMC supports 4 banks. You can use any one of them
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