I am trying to configure ADV7181D for CVBS inpu..
I want to know if it is required to set HSYNC registers too? reg: 33 34 35
because when i am monitoring hsync output from the IC it is very random and erratic.
There are scripts on the design support files page for ADV7181D that gives you everything you need to program for many different configurations: https://ez.analog.com/docs/DOC-2002
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