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AD9523-1 jitter and phase lock

Question asked by zhipeng on Jul 28, 2014
Latest reply on Aug 21, 2014 by charlyelkhoury

On the FMCOMMS1 board, using the reference design and no-OS driver, AD9548 OUT1P/OUT1N (clkout on SMB connectors) and AD9523-1 OUT5 (LOGEN_TX_REFIN, probed on resistor R30) are both 122.88MHz on average. However, if you use either one for oscilloscope trigger, the other one would look noisy and asynchronous.


Should this be the case, or something wrong with AD9523-1 chip on the demo board I got?


Is there a way to make AD9548 OUT1P/OUT1N (LOGEN_TX_REFIN) synchronous and phase locked to AD9548 OUT1P/OUT1N (clkout)?


Eventually, I want to use AD9548 OUT1P/OUT1N (clkout) as a trigger for a equivalent-time sampling oscilloscope as it has a convenient SMB connector, and look at the TX output (with carrier frequency at 1.96608GHz = 122.88MHz*16, DAC clocked at 122.88MHz as well). It seems TX output is sync with AD9523-1 OUT5 (LOGEN_TX_REFIN, probed on resistor R30), but not in sync with AD9548 OUT1P/OUT1N (clkout).


Thank you for helping.

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