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Simulation with ibis model of LVPECL clock distribution [AD9517]

Question asked by aberiain on Jul 22, 2014
Latest reply on Jul 23, 2014 by Kyle.Slightom

I am using hyperlynx simulator to check the signal integrity of a connection between the AD9517 frequency synthesizer and a LVPECL to LVDS converter (ICS854S204BGILF). The circuit work well when using the DC coupled configuration for the connection, but fails when using the AC coupled configuration. It seems that the introduction of the capacitor affects to the ibis model reliability and the inverter output of the differential PECL driver doesn't work properly. Does anyone have this same problem? Should I use directly the DC coupling?


In addition, I would like to know if anyone has test the at its maximum frequency (2.8 GHz) as I am having also frequency related problems.


Thanks for your time