Now my customer have problems on MCU boot BF706 and select SPI Slave Boot mode ,their codes can run well on JTAG Emulators.
First ,They want to know which SPI port for SPI Slave Boot mode？
Form BF70X Hardware Reference description(page 88) ：SPI Slave Boot through the SPI0.
Form BF70X datasheet description(page 8)：SPI Slave Boot through the SPI2 .
Form CCES “LDR " setting :SPI Slave boot also is SPI0.
As we know , Blackfin processor previously used "HWAIT" Pin for SPI slave boot transfer data status.
Does the BF70X SPIx_RDY pin same with the "HWAIT" function？
Now customer find that the SPIx_RDY signal is not inactive after system reset.（it can not from low turn to high）.
Kindly of you supply some suggests for this issue.