What will do Audio DPLL (what will be frequency on pin MCLK [G4]), if HDMI work in “Free Run” mode and HDMI source is absent?
My understanding is that it will be whatever the last valid source was if there was one and undefined if there wasn't but I'll check.
That is Audio DPLL don’t has controlled “Free Run” mode?
Nope. Audio is slaved to Video in HDMI. I don't see any reason why a separate free run couldn't be done, but that's not how the part was designed.
Dave, thank You
Just to close the loop.. I checked and my description is how it works.
OK, thank You
For knowledge, there is FAQ: “How do we limit the MCLK Output frequency on the HDMI Receivers?” https://ez.analog.com/docs/DOC-2826
This function use registers DPLL.0xD3..0xD5,0xCF – description is absent in registers map DPLL/AFE…
Yes-- intentionally so though I have no good explanation as to why.
However with the limiting registers you could, in theory, set the output MCLK to a specific frequency I think.
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