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ADN2915 CDR in LTD mode

Question asked by Mack on Jul 11, 2014
Latest reply on Jul 24, 2014 by Dongfeng



I am testing ADN2915 performance with a ADN2915 evlauation board.

     1. Pictures below are showing data output eye diagram from ADN2915 In LTD mode.

         When input is 6.144G, output eye diagram is good. However output eye diagram is moving back and forth when 10.312G.

         According to my test, frequency higher than 9G shows eye diagram which seems not to be triggered. Is any additional setting needed for high frequency?  With ADN2915 configured in power-on default value, it was tested. 

ADN2915 CDR.png


     2. Is it possible to implement PPG(Pulse Pattern Generator) and ED(Error Detection) at the same time with only a single ADN2915?

          Do I need to use 2 ADN2915s for the respective function?


     3. Can cross point postion of eye diagram be adjustable by a user?


Best Regards,