Hi there

I'm using the AD5933 with a custom AFE. I don't use AD5933's frequency sweep feature, I only do single freq measurement.

Since I want to measure impedance from 10Hz up to 100kHz, I need to adapt the MCLK. Instead of defining MCLK ranges as suggested in UG-364 , I opted for an adaptive strategy where the best MCLK is generated on the fly by an external clock generator for each frequency. The idea behind this strategy is to ensure that the MCLK is always an integer multiple of the excitatory frequency. The MCLK is calculated on the fly by the following formula

MCLK = OutFreq * 16 * 1024 / NbPeriods

Where OutFreq is the excitatory frequency and NbPeriods is the number of periods the DFT is feeded with. Note that in practice the applied MCLK is not exact because of rounding errors and limited resolution of the clock generator. This error is of max +/- 500Hz.

The results of a log spaced frequency sweep from 10Hz to 100kHz of a resistor are shown in the attached picture (amplitude and phase). The overall plot looks as expected, but there are some artifacts around the 1kHz range. I have found that those artifacts depend on the value of NbPeriods. High value of NbPeriods tend to decrease artifacts in the 1kHz range but increase artifacts in the lower freq range whereas low value of NbPeriods tend to increase artifacts in the 1kHz range but decrease artifacts in the lower freq range.

Has anyone an explanation for this phenomena ? Has it to do with the DDS harmonics that are MCLK dependent and in this case OutFreq dependent ? Do you see any problem in my adaptive MCLK approach ?

Thank you

Hi all

just wanted to let you know that everything is solved now. It was all due to a stupid bug in my software; the variable of the number of settling time cycles was inadvertently exchanged with the variable of the number of increment....mmmHH (they both start with nb something). Since I'm doing one point measurement, the settling time cycles was always set to one which is not sufficient for the system to stabilize.

Now I get impedance accuracy down to 0.1% (mean of 3 successive measurement) from 20Hz to 100kHz which suggests that my adaptive clock approach works well. In fact, I think it is a more elegant way to change the clock than the one presented in AN-843. With the DS1077 chip, the clock can be easily adapted on-the-fly with a simple I2C command on the same bus as the ad5933, which is very convenient... but not AN stuff, sorry.

Secondly, it also suggests that good results can be achieved down to 20Hz without an anti-aliasing filter. See the attached plot of a 998Ohm resistor after proper calibration.

Thank you all for your support! It was extremely appreciated