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ADAU1442 ASRC Implementation

Question asked by dan_xerx on Jul 7, 2014
Latest reply on Dec 1, 2014 by grimbart

Hello Everybody!

 

My proposed design involves an ASRC in which the Sigma DSP accepts S/PDIF input signals at different sampling rates and output as a S/PDIF signal as well. Say for example, incoming signals at multiples of 44.1KHz shall be sampled at 176.4KHz, otherwise sampling frequency will be default value of 192kHz.

 

Input Rate:                                         Output Sampling Rate :

44.1kHz (88.2kHz, etc....)    -------------------> 176.4kHz

the rest                ---------------------------------> 196kHz

 

How will the DSP detect such variation and decide which sampling rate to choose? How can the detected sampling rates be quantitatively measured so it can be verified? How can this be implemented in SigmaStudio (I/O block routing, placement, hardware settings?). Any reference link from previous threads?

 

Im' new to ASRC and so far I haven't grasped the concepts and implementation I've read from the resources in the forum.

 

 

Thanks in advance!

Regards,

Dan

 

Message was edited by: Dan Gumera

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