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AD9851 DDS reset mode

Question asked by mangeshgurav on Jul 1, 2014
Latest reply on Jul 7, 2014 by mangeshgurav

I have made board same as evaluation boardCGPCB  for clock genertion as per given in AD9851 datasheet.

But after reset mode instead of giving 1v at DAC output pin IOUT, I am getting 3.6v and 3.4v at pin 3.4v instead of 0v.

During normal mode, after programming , instead of getting 0 to 1vp-p sine wave, I am getting sine wave with 3.2v offset and 400mVpp swing with desired frequency.

I am using 7th order filter at the output of DAC IOUT terminated with 100ohm and Rset=3.9kohm to set maximum IOUT current 10mA.

Ouput of filter is given to input of comparator as per given in datasheet for board CGPCB.

Can any one tell me, Why I am getting 3.6v instead of 1v?