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AD9361/AD9364 LVDS interface

Question asked by SDR_Radio on Jun 30, 2014
Latest reply on Jun 30, 2014 by tlili


I am using AD-FMCOMMS2 board for evaluation purpose, now i want to use AD9361 or AD9364 in my customized design with some other FPGA.In Zynq all data and other lines are connected to FPGA with LVDS interface with 2.5 V GPIO.


But i wish to know that can i connect all data and other lines in same way to my FPGA with LVDS interfcace (2.5 V)?  If i use in CMOS mode,  what voltage level bank i need to connect to AD9361?


Finally which mode is better LVDS (or) CMOS mode? and voltage levels of in FPGA interface banks for both modes?