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High Frequency Limit - AD5933

Question asked by KMF on Jun 19, 2014
Latest reply on Mar 30, 2015 by musach

I have seen a few posts on taking measurements beyond the 100kHz range of the AD5933.  From the user guide and forum posts it looks like the chip was specifically designed up to 100kHz, and that limitations are in the ADC used.  I am looking for a way to make EIS measurements up to 500 kHz, and am not overly constrained by size.


One posting mentioned the use of the AD5933 + Y-mixer + clock option as a potential work-around for higher frequency applications.  How would this be implemented if the chip itself has an internal RC filter set to 150kHz?  Would the other option be to build out the functionality of the 5933 chip with individual components and a higher frequency ADC?



- Kevin