I'm trying to continuously stream large numbers of samples (without skipping any samples) into/out of an AD9361 on a ZedBoard running Linux. I have a few questions:
1. Is there an easy way to do this using the existing FPGA firmware and Linux driver stack? Just trying to continuously read out the IIO buffer leads to a lot of zero-valued samples being read out.
2. Is there any detailed documentation about the register interface for the AXI ADC HDL block? I've seen the wiki page and the driver source code, but there's not much there that describes what the registers and the corresponding bits within them actually do.