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AD7685 CNV, SDO, SCK powered down states

Question asked by slastuka on Jun 6, 2014
Latest reply on Jul 15, 2014 by KarenNE

I am running the AD7685 ADC with 3V on REF, VIO & VDD.  I am attempting to run it in CS MODE 3-WIRE WITH BUSY INDICATOR. 

 

I have a pull-up resistor on the SDO output.  However, when I toggle CNV high, SDO is low and stays low.  It should go high.  That way, when the busy status hits, I will see the negative going edge. 

 

I didn't design the circuit this part is located in.  The guy who did has since left our organization.  Today I noticed he put a note in schematic that says the 'PLD must ground these I/O when the AVDD switch is OFF.'  The I/O he is referring to are CNV, SDO, SCK.  The PLD is what these three pins connect to.  AVDD is 3V power supply to the above named power supply pins. 

 

During my testing, I have put 3V on the all the pins when the part was not powered.  Does anyone think I blew up the part?  Could this explain my busy bit being stuck low?

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