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BF609 cache control

Question asked by livio on Jun 7, 2014
Latest reply on Jun 12, 2014 by livio

Hi,

in my project, I'm using SMC (static memory controller) to control a set of hardware latches and IO buffers.

In this framework, for SMC memory area I must avoid using cache, because otherwise a poll to  memory mapped registers will always return the same result.

At the moment I use the 'flushinv' instruction to cleanup cache before every access.

 

Is it possible to instruct the procesor to avoid using cache for the memory map range corresponding to SMC (0xB0000000 to 0xBffffffff) ?

 

Thanks for help

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