I am using KC705+FMCOMMS2 to do test with AD9361. After I download HDL reference design and build project with vivado.
After P&R is done, it is reporting the following un-connected input pins for some IP. and I check the RTL file, finally vivado auto-connect the following signals to "GND_1".
My Question is: Does this behavior expect? or did I missing something?
[BD 41-759] The input pins (listed below) are either not connected or do not have a source port, and they don't have a tie-off specified.
Please check your design and connect them if needed:
Please help, thank you.