Hi Analog Devices People
I think there is a mistake in the AD9915 datasheet (Rev. D) on page 43. The bit description for register CFR3 bit 16 refers to enabling and disabling the internal doubler circuit (actually the function of bit 19). However, from the Register Map on p. 36, as well as the Evaluation Software, it seems as if this bit has to do with selecting the rising/falling edge of the clock.
I also noticed a typo on p.21: in the last line of the section "REF_CLK/nREF_CLK Overview" it says 3.5 GHz instead of 2.5 GHz.