I will be using the ADV7181C for digitizing NTSC and PAL as well as RS170 video inputs. I noticed in the 7181C user manual that SDP core output resolution is 720x480 for NTSC. Does this mean the decoder outputs 240 lines of data for each interlaced field (ie. F0 or F1)? And similarly for other video formats, how do I determine the line count for each output field?
I ask this because if the decoder doesn't output equal # of lines for both fields, then I need to perform clipping inside my FPGA to make them equal.
Thanks in advance!