We have designed a custom board based on ADSP 21469 processor. We have followed the guidelines in EE-68 document.
When I try to connect to the processor via the IDDE, I get an error saying that
"Unable to halt processor. JTAG connection failed. You may need to exit the debugger and reset the target HW to correct this problem."
A message box is also displayed showing an error id 0x80048042.
Also, the ICE Test utility successfully completes with no errors.
What could be the issue?
Could somebody guide me which are the signals that should be probed and tested so that we can identify the issue?
Could this be due to the problem caused by some other pins on the dsp?
We also checked the Ez-Kit schematics. In the Ez-Kit schematic, Pin 1 of the header is Pulled-Up where as in EE-68 Pin 1 is recommended to be connected to ground.
We have connected Pin 1 to ground. Could this be the issue?
Also, what should be be the state of the RESET pin for proper working of the dsp or starting a proper JTAG connection via the IDDE?