I'm confused by the JTAG output scans of an EVAL-ADUC7023QSPZ1 board. -- According to the schematic, the U5 (FT2232HL) is disconnected from the JTAG lines. But when inspecting the JLink.exe output I see 2 JTAG devices:
PS C:\Program Files (x86)\SEGGER\JLinkARM_V484e> .\JLink.exe -Device ADUC7023
SEGGER J-Link Commander V4.84e ('?' for help)
Compiled Apr 28 2014 20:50:11
Info: Device "ADUC7023" selected (62 KB flash, 8 KB RAM).
DLL version V4.84e, compiled Apr 28 2014 20:50:02
Firmware: J-Link ARM V8 compiled Nov 25 2013 19:20:08
Feature(s): RDI, GDB
VTarget = 3.287V
Info: ADI system TAP: Connecting to device with system TAP.
Info: TotalIRLen = 5, IRPrint = 0x11
Info: Analog devices system TAP: Enabling CPU core.
Info: TotalIRLen = 9, IRPrint = 0x0011
Found 2 JTAG devices, Total IRLen = 9:
#0 Id: 0x4F1F0F0F, IRLen: 04, IRPrint: 0x1, ARM7TDMI-S Core
#1 Id: 0x028011CB, IRLen: 05, IRPrint: 0x1, System level TAP
Found ARM with core Id 0x4F1F0F0F (ARM7)
RTCK reaction time is approx. 504ns
Using adaptive clocking instead of fixed JTAG speed.
What is the second JTAG device? A preliminary inspection of R35, R36, R37, R38 shows that they are not populated (by design).