Can Code be executed during Flash programming on the ADuC7128/7129 ?
The AduC702x products have only one Block of FLASH-memory and during erase & program the
core is suspended until the FLASH-State-Machine has executed the requested operation, if the Code
is executed from FLASH.
If the Code is executed from SRAM, the core can continue to work and SW has to check the
FLASH-State-Machine before transfering back to Code in FLASH.
On the ADuC7128/7129 there are two Block's of FLASH-memory integrated.
If the Code is executed from a different Block than the one on which the erase or program
operation is started, the core can continue to run.
Again SW has also to check the FLASH-State-Machine before transferring execution
back to the manipulated Block.
As MMA says, the key point to remember is that any access from the flash while the flash controller is "busy" will result in that access being stalled until the flash operation is complete.
Execution from the flash is prevented by running routines from SRAM during this time.
Bear in mind though that a data access from flash by code running in SRAM will also result in the same stall. Avoid this operation in the code running in SRAM.
You should also consider moving the interrupt vector table into SRAM during this time (by using the REMAP register) as a vector fetch will - by default - come from the flash area and result in the same stall.
Retrieving data ...