Now I am doing UART with DMA.
Firstly, UART_DMA_TxIsr is assigned to IVG9, and UART_DMA_RxIsr is assigned to IVG10. it works well.
For making effective use of ADSP interruptions, both UART_DMA_RxIsr and UART_DMA_TxIsr are assigned to IVG9(It is default), the system is broken. The data buffer is received and transmitted OK, but ISRs is in problem .For example. When running UART_Receive_Block(), the UART_DAM_TxIsr will be re-entered.
When I read "bf561 Hardware Reference" carefully, Some qestions are here. It is said that
"If more than one interrupt source is mapped to the same interrupt,... Software is responsible for prioitizing the shared interrupt."
How could i do that in my situation ?
If here some examples for me ???