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AD9643 test modes

Question asked by rrlagic on Apr 23, 2014
Latest reply on Oct 27, 2017 by J.Harris



I'd like to ask expert's clarification on test modes of AD9643.


The first question is about test mode 1111=ramp output. What is expected slope of the ramp? I see ADC readings linearly go down from most positive value to most negative, then jump back again to most positive, i.e. the slope is negative. Is that correct?


The second is about user test mode 1000. AD9643 is 14-bit ADC, while user patterns are stored in two 8-bit register pairs, constituting 16-bit word. Which bits are transmitted in user test mode? I expect 8 LSB and 6 MSB. So, say, if I write 0x00 to 0x19 (User Test Pattern 1[7:0) and 0xFF to 0x20 (User Test Pattern 1[15:8]) I expect to see 0x3F00. Is that correct?


Thanks in advance.