Dear AD engineers,
First of all thank you for great work you have already done.
I have a small question.
Do I understand right that YOUR AD9361 NO-OS driver needs YOUR HDL design in the FPGA part?
Or, in other words, it is impossible to use YOUR NO-OS driver right out of the box with my own custom FPGA design.
If so, may I ask you to describe what exact parts of the driver need your HDL design, and what parts can be used with ANY FPGA design (just using SPI and nothing else).
What functionality will be lost?