I have a short question. On our self designed board with BF561 we are having 128 MBYTE of SDRAM. I am using the system service to setup the memory. In a normal main application running from L1 I can start a memory test and write and read from all 128 MBytes from CoreA.
No I have larger application using VDK. So I have used the the setup wizard an created a dual core project and on each processor an own application. The wizard was guiding me through the settings. Than I was asked for I-Cache and D-Cache. I have selected to use ICache and DCache. The memory I have selected is 128 Mbyte. I can see in the linker file that each core gets 64 Mbytes. The problem I have is when I want to run the code now as well on CoreB I always got an cplbmiss error.
I have selected no to use the XML with standard values to use on start up. I would like to use system service and the ssl_init.h, ssl_init.c to initalize memory. Any suggestion!