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jdata encode mode not working

Question asked by Baathu on Jul 29, 2010
Latest reply on Aug 2, 2010 by Baathu

Hi

   Am using 8-bit jdata mode to receive compressed data.Am getting the interrupt and application ID,But am not able to get perfect compressed data as output, am checking for the adv212 header but  am getting some 0xF7F7F7F7 completely. Am sending PAL 720x625 frame to encode, which includes sav and eav and blanking. The total size of the frame is such that each line contains 1728 bytes and total of 625 lines. The code what am using to encode is shown below.If there is any change to be done in setting the parameters or order of settings please kindly inform.

 

 

//SET PLL_HI AND PLL_LO
adv212_write_direct_reg (GRS_MAIN_HDATA_CTRL_0_adv212_2_PLL_HI,0x0008);
wait_time(900000);
adv212_write_direct_reg (GRS_MAIN_HDATA_CTRL_0_adv212_2_PLL_LO,0x0004);
wait_time(900000);
//ENTER NO BOOT HOST MODE
adv212_write_direct_reg(GRS_MAIN_HDATA_CTRL_0_adv212_2_BOOT,0x008A);
wait_time(900000);
//-------------set busmode and miscellaneous mode
adv212_write_direct_reg(GRS_MAIN_HDATA_CTRL_0_adv212_2_BMODE,0x0005);
wait_time(90000);
adv212_write_direct_reg(GRS_MAIN_HDATA_CTRL_0_adv212_2_MMODE,0x0005);//09
wait_time(90000);
//-------------LOAD FIRMWARE--------------------------
unsigned long mem_data;
unsigned long i;
unsigned long firmware_address = 0x00050000;
unsigned long addr_onchip; /////////////////////// onchip memory address
addr_onchip = GRS_MAIN_SDRAM_0_BASE;
reg_write(GRS_MAIN_HDATA_CTRL_0_adv212_2_STAGE,0x0005);
reg_write(GRS_MAIN_HDATA_CTRL_0_adv212_2_IADDR,0x0000);
for (i=0;i<=32768;i=i+4 )
  {
   mem_data         = reg_read(addr_onchip);
   addr_onchip      = addr_onchip + 4;
   adv212_write_firmware(mem_data,GRS_MAIN_HDATA_CTRL_0_adv212_2_IDATA);
  }
  printf("add 0x%08X \n",addr_onchip);
  printf("loading firmware completed \n");
//SOFT REBOOT
adv212_write_direct_reg(GRS_MAIN_HDATA_CTRL_0_adv212_2_BOOT, 0x008D);
//setting bus and mmode
adv212_write_direct_reg(GRS_MAIN_HDATA_CTRL_0_adv212_2_BMODE,0x0015);
adv212_write_direct_reg(GRS_MAIN_HDATA_CTRL_0_adv212_2_MMODE,0x0005);  
//-----------setting encode parameters------------
reg_write(GRS_MAIN_HDATA_CTRL_0_adv212_2_STAGE,0x0005);
reg_write(GRS_MAIN_HDATA_CTRL_0_adv212_2_IADDR,0x7F00);
adv212_write_direct_reg(GRS_MAIN_HDATA_CTRL_0_adv212_2_IDATA,0X0100);  
adv212_write_direct_reg(GRS_MAIN_HDATA_CTRL_0_adv212_2_IDATA,0X0503);
adv212_write_direct_reg(GRS_MAIN_HDATA_CTRL_0_adv212_2_IDATA,0X0000);
adv212_write_direct_reg(GRS_MAIN_HDATA_CTRL_0_adv212_2_IDATA,0X0000);
adv212_write_direct_reg(GRS_MAIN_HDATA_CTRL_0_adv212_2_IDATA,0X0205);
adv212_write_direct_reg(GRS_MAIN_HDATA_CTRL_0_adv212_2_IDATA,0X0000);
adv212_write_direct_reg(GRS_MAIN_HDATA_CTRL_0_adv212_2_IDATA,0X0100);
adv212_write_direct_reg(GRS_MAIN_HDATA_CTRL_0_adv212_2_IDATA,0X0100);
///////////////////////////////////////////////////////////////////////////////////
reg_write(GRS_MAIN_HDATA_CTRL_0_adv212_1_STAGE,0xFFFF);
reg_write(GRS_MAIN_HDATA_CTRL_0_adv212_1_IADDR,0x1408);
reg_write(GRS_MAIN_HDATA_CTRL_0_adv212_1_IDATA,0x061A);
//Enable EIRQIE[1] (DFTH) and EIRQIE[10] (SWIRQ0)
reg_write(GRS_MAIN_HDATA_CTRL_0_adv212_2_EIRQIE, 0x0400);//400       
printf("checking for interrupt \n");
 
//check EIRQFLG[10] is asserted or not
while(reg_read(GRS_MAIN_HDATA_CTRL_0_adv212_2_EIRQFLG) != 0x040F){
for(i=0;i<10000;i++){
  printf("reading from add: 0x%08X, data 0x%08X \n",GRS_MAIN_HDATA_CTRL_0_adv212_2_EIRQFLG , adv212_read_direct_reg(GRS_MAIN_HDATA_CTRL_0_adv212_2_EIRQFLG));
  }
  printf("interrupt not occured--reload ENCODE firmware\n");
break;
  }
printf("interrupt completed\n");
reg_write(GRS_MAIN_HDATA_CTRL_0_adv212_1_STAGE,0xFFFF);
reg_write(GRS_MAIN_HDATA_CTRL_0_adv212_1_IADDR,0x1408);
reg_write(GRS_MAIN_HDATA_CTRL_0_adv212_1_IDATA,0x061B);
//ENCODING CHECK FIRMWARE CORRECTLY LOADED
reg_read_comp(GRS_MAIN_HDATA_CTRL_0_adv212_2_SWFLAG,0xFF82);
adv212_write_direct_reg(GRS_MAIN_HDATA_CTRL_0_adv212_2_EIRQFLG,0xFFFF);
adv212_write_direct_reg(GRS_MAIN_HDATA_CTRL_0_adv212_2_BMODE,0x0015);
adv212_write_direct_reg(GRS_MAIN_HDATA_CTRL_0_adv212_2_MMODE,0x0005);  

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